Edison
Optical compute foundry
Optical compute foundry

A fab built
for photons.

Edison is a semiconductor plant designed from the ground up around a single product class: next-generation optical computing chips.

Scroll
01 — The ceiling

Transistors still shrink. Data no longer moves.

Density improves on schedule. Interconnect does not. In modern accelerators the limit is set by the energy and latency of pushing electrons between memory and compute, and by the heat that leaves behind.

Each generation spends a larger share of its power budget on movement rather than arithmetic. That share is the ceiling.

[ % ]
Power spent on data movement
[ pJ/bit ]
Interconnect energy per bit
[ % ]
Utilisation lost to memory stalls
02 — The medium

Light carries more, over further, for less.

No resistive loss

A photon crossing a die costs the same as a photon crossing a rack. Distance stops being a power question.

Wavelength multiplexing

One waveguide carries many independent channels at once. Bandwidth scales with colour, not with pin count.

Passive arithmetic

Interference performs matrix multiplication in the optics themselves, with no clocked switching to pay for.

The physics has been demonstrated. The manufacturing has not.

03 — The plant

A logic foundry treats our process as an exception.

Optical dies need thick waveguide stacks, etch uniformity held below a nanometre across the wafer, laser attach on die, and optical test before packaging. In a CMOS line these are deviations, scheduled around someone else's volume.

Borrowing capacity means accepting their tolerances and their queue. So Edison is building the line itself, with every module chosen for photonics first.

M01
Lithography
M02
Etch & deposition
M03
Waveguide stack
M04
Laser integration
M05
Wafer-level optical test
M06
Packaging & fibre
Edison